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IR1169S 1 www.irf.com ? 20 12 international rectifier december 12, 2012 advanced smart rectifier tm control ic features ? secondary side high speed sr controller ? flyback, forward and half - bridge topologies ? ccm operation with sync function ? 200v proprietary ic technology ? max 500khz switching frequency ? anti - bounce logic and uvlo protection ? 4a peak turn off drive current ? micropower start - up & low quiescent current ? 10.7v gate drive clamp ? 50ns turn - off propagation delay ? vcc range from 11v to 20v ? enable function sync hronized with mosfet vds transition ? cycle by cycle mot check circuit prevents multiple false trigger gate pulses ? lead- free ? compatible with 0.3w standby, energy star, cecp, etc. typical applications ? telecom smps, atx smps, server smps, ac - dc adapters product summary topology flyback, forward, half - bridge vd 200v v out 10.7v i o+ & i o - (typical) +1a & - 4a turn on propagation delay 7 0ns (typical) turn off propagation delay 50ns (typical) package options 8 - lead soic ordering information base part number package type standard pack complete part number form quantity IR1169S soic8 n tube/bulk 95 ir 1169spbf tape and reel 2500 ir 1169 strpbf
IR1169S 2 www.irf.com ? 20 12 international rectifier december 12, 2012 typical connection diagram vout vcc vin rtn cin primary controller 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd rmot rg cvcc l rcc cout qfwl ir1169
IR1169S 3 www.irf.com ? 20 12 international rectifier december 12, 2012 table of contents page ordering information 1 description 4 absolute maximum ratings 5 e lectrical characteristics 6 functional block diagram 8 input/output pin equivalent circuit diagram 9 lead definitions 1 0 lead assignments 1 0 detailed pin description 11 application information and additional details 1 2 package details 2 4 tape and reel details 2 5 part marking information 2 6 qualification information 2 7
IR1169S 4 www.irf.com ? 20 12 international rectifier december 12, 2012 description ir1169 is a smart secondary - side driver ic designed to drive n - channel power mosfets used as synchronous rectifiers in isolated flyback, forward or half - bridge converters. the ic can control one or more paralleled n - mosfets to emulate the behavior of schottky diode rectifiers. ir1169 works in both dcm and ccm operat ion modes. the sync pin should be used in ccm mode to directly turn - off the mosfet by a signal from secondary or primary controller. the ic is designed to use simple capacitor coupling interface to communicate with primary controller. in addition to the sync control, the drain to source voltage is sensed differentially to determine the polarity of the current and turn the power switch on and off in proximity of the zero current transition. ruggedness and noise immunity are accomplished using an advanced b lanking scheme and double - pulse suppression which allow reliable operation in all operating modes.
IR1169S 5 www.irf.com ? 20 12 international rectifier december 12, 2012 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absol ute voltages referenced to com, all currents are defined positive into any lead. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. parameters symbol min. max. units remarks supply voltage v cc - 0.3 20 v enable voltage v en - 0.3 20 v cont. sync voltage v sync - 0.3 20 v pulse sync voltage v sync - 0.7 20 v sync current i sync - 10 10 ma cont. drain sense voltage v d - 1 200 v pulse drain sense voltage v d - 5 200 v source sense voltage v s - 3 20 v gate voltage v gate - 0.3 20 v v cc =20v, gate off operating junction temperature t j - 40 150 c storage temperature t s - 55 150 c thermal resistance r t ja 128 c/w soic - 8 package power dissipation p d 970 mw soic - 8, t amb =25c an input resistor of 2k? or above is required to sync pin for negative pulse recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v cc supply voltage 11 1 9 v v d drain sense voltage - 3 200 t j junction temperature - 25 125 c fsw switching frequency --- 500 khz v d - 3v negative spike width 100ns recommended component values symbol component min. max. units r mot mot pin resistor value 5 75 k :
IR1169S 6 www.irf.com ? 20 12 international rectifier december 12, 2012 electrical characteristics vcc=15v and t a = 25c unless otherwise specified. the output voltage and current (v o and i o ) parameters are referenced to gnd (pin7). supply section parameters symbol min. typ. max. units remarks v cc turn on threshold v cc on 9.4 10.4 11.0 v v cc turn off threshold v cc uvlo 8.6 9.3 10.0 v (under voltage lock out) v cc turn on/off hysteresis v cc hyst 1.1 v operating current i cc 8.5 10 ma c load =1nf,f sw =400khz 45 55 ma c load =10nf,f sw =400khz quiescent current i qcc 1.8 2.3 ma sync=low start - up current i cc start 100 200 a v cc =v cc on - 0.1v sleep current i sleep 150 200 a v en =0v, v cc =15v enable voltage high v enhi 2.2 5 2. 8 3. 3 v enable voltage low v enlo 1.2 1.6 2.0 v enable pull - up resistance r en 1.5 m ? gbd comparator section parameters symbol min. typ. max. units remarks turn - off threshold v th1 - 7 - 3.5 0 mv turn - on threshold v th2 - 263 - 230 - 197 mv hysteresis v hyst 230 mv input bias current i ibias1 1 7.5 a v d = - 50mv input bias current i ibias2 1 0 100 a v d = 200v input cm voltage range v cm 0 2 v one - shot section parameters symbol min. typ. max. units remarks blanking pulse duration t blank 9 17 25 s reset threshold v th3 2.5 v v cc =10v ? gbd 5.4 v v cc =20v ? gbd hysteresis v hyst3 40 mv v cc =10v ? gbd minimum on time section parameters symbol min. typ. max. units remarks minimum on time t onmin 18 0 240 30 0 ns r mot =5k ?, v cc =12v 2.4 3 3.6 s r mot =75k ?, v cc =12v
IR1169S 7 www.irf.com ? 20 12 international rectifier december 12, 2012 electrical characteristics vcc=15v and t a = 25c unless otherwise specified. the output voltage and current (v o and i o ) parameters are referenced to gnd (pin7). sync section parameters symbol min. typ. max. units remarks sync voltage high (disable) v syhi 2.0 2.5 3.0 v sync voltage low (enable) v sylo 0.6 0.8 1.0 v sync turn - on prop. delay t syon 6 5 100 ns sync =high to low sync turn - off prop. delay t syoff 5 5 90 ns sync=low to high minimum sync pulse width t sypw 50 ns gbd gate driver section parameters symbol min. typ. max. units remarks gate low voltage v glo 0. 24 0.5 v i gate = 200ma gate high voltage v gth 9.0 10.7 1 4 v v cc =12v - 18v (internally clamped) rise time t r1 20 ns c load = 1nf, v cc =12v t r2 180 ns c load = 10nf, v cc =12v fall time t f1 10 ns c load = 1nf, v cc =12v t f2 44 ns c load =10nf, v cc =12v turn on propagation delay t don 7 0 95 ns v ds to v gate ? v ds goes down from 6v to - 1v turn off propagation delay t doff 50 75 ns v ds to v gate ? v ds goes up from - 1v to 6v pull up resistance r up 5 ? i gate = 200ma ? gbd pull down resistance r down 1.2 ? i gate = - 200ma output peak current(source) i o source 1 a c load = 10nf ? gbd output peak current (sink) i o sink 4 a c load = 10nf ? gbd
IR1169S 8 www.irf.com ? 20 12 international rectifier december 12, 2012 functional block diagram uvlo & regulator vd vcc vth1 vth2 gnd en vgate vs vth3 mot sync vcc min off time reset min on time reset driver vcc cycle by cycle mot check circuit reset reset
IR1169S 9 www.irf.com ? 20 12 international rectifier december 12, 2012 i/o pin equivalent circuit diagram vcc gnd mot/ or en esd diode esd diode r esd vcc gnd sync esd diode esd diode vd gnd esd diode 200v diode r esd vcc gnd gate esd diode esd diode
IR1169S 10 www.irf.com ? 20 12 international rectifier december 12, 2012 lead definitions pin# symbol description 1 v cc supply voltage 2 sync sync input for direct turn off 3 mot minimum on time 4 en enable 5 vd fet drain sensing 6 vs fet source sensing 7 gnd ground 8 vgate gate drive output lead assignments vd gnd vgate vs vcc mot en sync 4 3 2 1 5 6 7 8 ir1169
IR1169S 11 www.irf.com ? 20 12 international rectifier december 12, 2012 detailed pin description vcc: power supply this is the supply voltage pin of the ic and it is monitored by the under voltage lockout circuit. it is possible to turn off the ic by pulling this pin below the minimum turn off threshold voltage, without damage to the ic. to prevent noise problems, a bypass ceramic capacitor connected to vcc and com should be placed as close as possible to the ir1169. this pin is internally clamped. sync: direct turn - off and reset sync is used to directly turn - off the sr mosfet by an external signal. the gate output of ir1169 is low when sync voltage is higher than v syhi threshold. the propagation delay from sync goes high to gate turns off is 5 5ns. the turn - off of sync is a direct control and it ignores the mot time (override). the sync pin will reset mot and blanki ng time when sync switches from low to high. it will reset mot timer and blanking timer only at the rising edge of signal. this function is useful for very low output voltage condition (such as overload or short circuit) where the vd voltage is too low to reach vth3 threshold to reset the timers. sync pin also can be used to control the turn - on time of sr mosfet (adding additional delay time at turn - on for noise immunity). if not used, sync pin should be connected to gnd. mot: minimum on time the mot pro gramming pin controls the amount of minimum on time. when v sync is low and v th2 is crossed, the gate signal will become active and turn on the power fet. spurious ringings and oscillations can trigger the input comparator off. the mot blanks the input comp arator keeping the fet on for a minimum time. the mot is programmed between 200ns and 3us (typ.) by using a resistor referenced to com. en: enable this pin is used to activate the ic ?sleep? mode by pulling the voltage level below 1.6v (typ). in sleep mod e the ic will consume a minimum amount of current. all switching functions will be disabled and the gate will be inactive. vd: drain voltage sense vd is the voltage sense pin for the power mosfet drain. this is a high voltage pin and particular care must be taken in properly routing the connection to the power mosfet drain. vs: source voltage sense vs is the differential sense pin for the power mosfet source. this pin should be connected directly to the power ground pin (7) but must be used to create a ke lvin contact as close as possible to the power mosfet source pin. gnd: ground this is ground potential pin of the integrated control circuit. the internal devices and gate driver are referenced to this point. vgate: gate drive output this is the gate drive output of the ic. drive voltage is internally limited and provides 1a peak source and 4a peak sink capability. although this pin can be directly connected to the power mosfet gate, the use of minimal gate resistor is recommended, es pecially when putting multiple fets in parallel. care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal switching performance.
IR1169S 12 www.irf.com ? 20 12 international rectifier december 12, 2012 application information and additional details state diagram uvlo/sleep mode the ic remains in the uvlo condition until the voltage on the vcc pin exceeds the vcc turn on threshold voltage, v cc on . during the time the ic remains in the uvlo state, the gate drive circuit is inactive and the ic draws a quiescent current of i cc start . the uvlo mode is accessible from any other state of operation whenever the ic supply voltage condition of vcc < v cc uvlo occurs. the sleep mode is initiated by pulling the en pin below 1.6v (typ). in this mode the ic is essenti ally shut down and draws a very low quiescent supply current. normal mode and synchronized enable function the ic enters in normal operating mode once the uvlo voltage has been exceeded and en voltage is above v enhi threshold. when the ic enters normal m ode from uvlo mode, the gate output is disabled (stays low) until v ds exceeds v th3 to activate the gate. this ensures that the gate output is not enabled in the middle of a switching cycle. this logic prevents any reverse currents across the device due to minimum on time function in the ic. the gate will continuously drive the sr mosfet after this one - time activation. the cycle by cycle mot protection circuit is enabled in normal mode. mot protection mode if the secondary current conduction time is shorter than the mot (minimum on time) setting, the next driver output is disabled. this function can avoid reverse current that occurs when the system works at very low duty - cycles or at very light/no load conditions and reduce system standby power consumption b y disabling gate outputs. the cycle by cycle mot check circuit is always activated under normal mode and mot protection mode, so that the ic can automatically resume normal operation once the load increases to a level and the secondary current conduction t ime is longer than mot. power on gate inactive uvlo mode vcc < vccon gate inactive icc max = 200ua normal gate active gate pw mot cycle by cycle mot check enabled sync enabled vcc > vccon, enable high vcc < vccuvlo or enable low mot protection mode gate output disabled v ds >v th1 @ mot v ds IR1169S 13 www.irf.com ? 20 12 international rectifier december 12, 2012 general description the ir1169 smart rectifier ic can emulate the operation of diode rectifier by properly driving a synchronous rectifier (sr) mosfet. the direction of the rectified current is sensed by the input comparator using the power mosfet r dson as a shunt resistance and the gate pin of the mosfet is driven accordingly. internal blanking logic is used to prevent spurious transitions. the synchronous pin (sync) can directly take the signal sent from primary controller to turn off the gate of sr mosfet prior to the turn - on of primary mosfet therefore prevent negative current in sr circuit under ccm condition. ir1169 is suitable for flyback, forward and resonant half - bridge topologies. figure 1: input comparator thresholds flyback application the modes of operation for a flyback circuit differ mainly for the turn - off phase of the sr switch, while the turn - on phase of the secondary switch (which corresponds to the turn off of the primary side switch) is identical. turn - on phase when the conduction phase of the sr fet is initiated, current will start flowing through its body diode, generating a negative v ds voltage across it. the body diode has generally a much higher voltage drop than the one caused by the mosfet on resistance and therefore will trigger the turn - on threshold v th2 . at that point, if sync voltage is low ir1169 will drive the gate of mosfet on, which will in turn cause the conduction voltage vds to drop down. this drop is usually accompanied by some amount of ringing, that can trigger the input compar ator to turn off; hence, a minimum on time (mot) blanking period is used that will maintain the power mosfet on for a minimum amount of time. the programmed mot will limit also the minimum duty cycle of the sr mosfet and, as a consequence, the max duty c ycle of the primary side switch. dcm/crcm turn - off phase once the sr mosfet has been turned on, it will remain on until the rectified current will decay to the level where v ds will cross the turn - off threshold v th1 . this will happen differently depending on the mode of operation. in dcm the current will cross the threshold with a relatively low di/dt. once the threshold is crossed, ir1169 will turn off gate and the current will start flowing again thru the body diode, causing the v ds voltage to jump negat ive. depending on the amount of residual current, v ds may trigger once again the turn on threshold: for this reason v th2 is blanked for a certain amount of time (t blank ) after v th1 has been triggered. the blanking time is internally set. as soon as v ds cro sses the positive threshold v th3 the blanking time is terminated and the ic is ready for next conduction cycle. v gate v th 1 v th 2 v th 3 v ds
IR1169S 14 www.irf.com ? 20 12 international rectifier december 12, 2012 i d_prim i d_sec v ds_sec v ds_ prim time time t1 t 2 t3 figure 2: flyback p rimary and secondary currents and voltages for dcm mode time time t1 t2 i d_prim i d_sec v ds_sec v ds_prim figure 3: flyback p rimary and secondary currents and voltages for crcm mode vin rtn cin 8 7 6 5 1 2 3 4 ir1169 s vcc gate sync mot en gnd vs vd rmot rg cvcc vout cout ir1169 rcc figure 4: ir1169 schematic in dcm/crcm mode flyback
IR1169S 15 www.irf.com ? 20 12 international rectifier december 12, 2012 gate drive i sec v ds blanking time time t1 t2 v th1 v th2 v th3 17us blanking mot tdon tdoff figure 5: ir1169 dcm/crcm sync rect operation (with sync connected to com) ccm turn - off phase in ccm mode the turn on phase is identical to dcm or crcm and therefore won?t be repeated here. the turn off transition is much steeper and di/dt involved is much higher (figure 6). if the sr controller wait for the primary switch to turn back on and turn the gate off according to the fet current crossing v th1 , it has high chance to get reverse current in the sr mosfet. a predictable turn - off prior to the primary turn - on is necessary. a decoupling and isolation capacitor can be used to couple the primary gate signal to ir1169 sync pin and turn - off the sr mosfet prior to the current slope goes to negative. some turn - on delay to the primary mosfet can guarantee no shoot through between the primary and secondary. time time t1 t2 i d_prim i d_sec v ds_sec v ds_prim figure 6: primary and secondary currents and voltages for ccm mode in ccm application the connection of ir1169 is recommended as shown in figure 7.
IR1169S 16 www.irf.com ? 20 12 international rectifier december 12, 2012 vcc vin rtn cin primary controller 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd rmot rg cvcc vout cout ir1169 rcc m1 figure 7: ir1169 schematic in ccm mode flyback ir1169 is designed to directly take the control information from primary side with capacitor coupling. a high voltage, low capacitance capacitor is used to send the primary gate driver signal to the sync pin. to have the circuit work properly, a y cap is r equired between primary ground and secondary ground. no pulse transformer is required for the sync function, helps saving cost and pcb area. the turn - off phase with sync control is shown in figure 8. in this case a blanking period is not applied; sync logic high will reset blanking time. i sec v ds time time t1 t2 v th1 v th2 mot mot time gate drive sync tdon tsyoff sync low, gate is enabled sync high, turn off the gate & reset blanking time primary gate v syhi v sylo primary turn-on is been delayed to avoid shoot-through figure 8: s econdary side ccm operation
IR1169S 17 www.irf.com ? 20 12 international rectifier december 12, 2012 forward application the typical forward schematic with ir1169 is shown in figure 9. the operation waveform of secondary sync rect circuit in forward is similar to the ccm operation of flyback. primary controller synchronous signal 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd load coupling cap y cap figure 9: forward application circuit
IR1169S 18 www.irf.com ? 20 12 international rectifier december 12, 2012 resonant h alf - bridge application the typical application circuit of ir1169 in llc half - bridge is shown in figure 10. 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd rmot2 rg2 cvcc2 cout ir1169 rcc2 m4 8 7 6 5 1 2 3 4 IR1169S vcc gate sync mot en gnd vs vd rmot1 rg1 cvcc1 ir1169 rcc1 m3 vout t1 lm lr cr m1 m2 vin rtn figure 10: resonant half - bridge application circuit the sync pin can be tied to com in llc converter. the turn - on ph ase and turn - off phase is similar to flyback converter except the current shape is sinusoid. the typical operation waveform can be found below. figure 11: resonant half - bridge operation waveform (with sync connected to gnd) gate drive v ds blanking time t1 t2 v th1 v th2 v th3 mot t blank i ds
IR1169S 19 www.irf.com ? 20 12 international rectifier december 12, 2012 the sync pin also can be connected to a control signal for special turn - on and/or turn - off control. figure 12 is an example where the sync function is used to put some delay to the turn - on phase. gate drive v ds blanking time t1 t2 v th1 v th2 v th3 mot t blank i ds tsyon sync tdoff sync rising edge, reset mot and tblank figure 12: resonant half - bridge with sync control mot protection mode the mot protection prevents reverse current in sr mosfet. this function works in all three topologies. figure 13 is an example in flyback converter. figure 13: mot protection mode time i sec v ds gate drive mot sensed vd>v th1 at the end of mot disable the next gate output
IR1169S 20 www.irf.com ? 20 12 international rectifier december 12, 2012 sync reset function the sync pin resets mot and blanking time when sync switches from low to high. this function is useful for very low output voltage condition (such as overload or short circuit) where the vd voltage is too low to reach vth3 threshold to reset the timers. gate drive v ds time t1 t2 v th1 v th2 v th3 mot i ds tsyon sync tdoff v ds IR1169S 21 www.irf.com ? 20 12 international rectifier december 12, 2012 figure 1 6 : undervoltage lockout vs. temperature figure 17 : icc quiescent currrent vs. temperature figure 1 8 : icc supply currrent @1nf load vs. temperature figure 1 9 : v th1 vs. temperature 8 v 9 v 10 v 11 v -50 c 0 c 50 c 100 c 150 c vcc uvlo thresholds temperature vcc on vcc uvlo 1.5 2.0 2.5 -50 c 0 c 50 c 100 c 150 c i qcc supply current (ma) temperature i qcc 8.0 8.5 9.0 -50 c 0 c 50 c 100 c 150 c i cc supply current (ma) temperature icc @400khz, c load =1nf -6.0 -5.0 -4.0 -3.0 -2.0 -50 c 0 c 50 c 100 c 150 c v th1 threshold (mv) temperature
IR1169S 22 www.irf.com ? 20 12 international rectifier december 12, 2012 figure 20 : v th2 vs. temperature figure 2 1 : turn - on and turn - off propagation delay vs. temperature figure 22 : mot vs temperature figure 23 : enable threshold vs. temperature -300.0 -250.0 -200.0 -150.0 -50 c 0 c 50 c 100 c 150 c v th2 thresholds (mv) temperature 35 ns 40 ns 45 ns 50 ns 55 ns 60 ns 65 ns 70 ns 75 ns -50 c 0 c 50 c 100 c 150 c propagation delay temperature turn-on propagation delay turn-off propagation delay 0 us 1 us 2 us 3 us 4 us -50 c 0 c 50 c 100 c 150 c minimum on time (us) temperature rmot=75k rmot=25k rmot=5k 1.0 v 1.5 v 2.0 v 2.5 v 3.0 v -50 c 0 c 50 c 100 c 150 c enable thresholds temperature ven hi ven lo
IR1169S 23 www.irf.com ? 20 12 international rectifier december 12, 2012 figure 24 : sync thresholds vs. temperature figure 2 5 : sync turn - on and turn - off propagation delay vs. temperature figure 2 6 : gate clamping voltage vs. temperature figure 2 7 : rise and fall time vs. temperature 0.5 v 1.0 v 1.5 v 2.0 v 2.5 v 3.0 v -50 c 0 c 50 c 100 c 150 c sync thresholds temperature sync hi sync lo 35 ns 40 ns 45 ns 50 ns 55 ns 60 ns 65 ns 70 ns 75 ns 80 ns -50 c 0 c 50 c 100 c 150 c propagation delay temperature sync turn-on delay sync turn-off delay 10.0 v 10.5 v 11.0 v 11.5 v -50 c 0 c 50 c 100 c 150 c gate high voltage temperature vgh@vcc=18v vgh@vcc=12v 0 ns 5 ns 10 ns 15 ns 20 ns 25 ns -50 c 0 c 50 c 100 c 150 c tr and tf time at 1nf load temperature tr tf
IR1169S 24 www.irf.com ? 20 12 international rectifier december 12, 2012 package details: soic8n
IR1169S 25 www.irf.com ? 20 12 international rectifier december 12, 2012 tape and reel details: soic 8n e f a c d g a b h note : controlling dimension in mm loaded tape feed direction a h f e g d b c carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 metric imperial reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial
IR1169S 26 www.irf.com ? 20 12 international rectifier december 12, 2012 part marking information non-lead free released IR1169S ir logo yww ? part number date code pin 1 identifier lot code (prod mode ? 4 digit spn code) assembly site code per scop 200-002 c xxxx marking code lead free released ? p
IR1169S 27 www.irf.com ? 20 12 international rectifier december 12, 2012 qualification information ? qualification level industrial ?? comments: this family of ics has passed jedec?s industrial qualification. ir?s consumer qualification level is granted by extension of the higher industrial level. moisture sensitivity level soic8n msl2 ??? 260c (per ipc/jedec j - std - 020) esd machine model class a (per jedec standard jesd22 - a115) human body model class 1c (per eia/jedec standard eia/jesd22 - a114) ic latch - up test class i, level a (per jesd78) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information. the information provided in this document is believed to be accurate and reliable. however, international rectifier assumes n o responsibility for the consequences of the use of this information. international rectifier assumes no responsibility for any in fringement of patents or of other rights of third parties which may result from the use of this information. no license is granted by implication or oth erwise under any patent or patent rights of international rectifier. the specifications mentioned in t his document are subject to change without notice. this document supersedes and replaces all information previously supplied. for technical support, please contact ir?s technical assistance center htt p://www.irf.com/technical - info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252 - 7105

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